1. Field of the Invention
The present invention relates to a monolithic ceramic capacitor. More specifically, the present invention relates to a multi-terminal monolithic ceramic capacitor arranged to reduce an equivalent series inductance (ESL).
2. Description of the Related Art
In a power supply circuit, an increase in voltage variations in a power supply line due to the presence of impedance in the power supply line or a ground may cause an unstable operation of circuits, interference between the circuits through the power supply circuit, or oscillation. In order to address such problems, a decoupling capacitor is typically connected between the power supply line and the ground. The decoupling capacitor reduces the impedance between the power supply line and the ground to suppress variations in power supply voltage or interference between the circuits.
Recently, in communication devices, such as mobile phones, or information processing devices, such as personal computers, the signal transmission speed has increased in order to process a large amount of information, and the clock frequency of an integrated circuit (IC) used therewith has also increased. Accordingly, noise including a large number of harmonic components is likely to occur, and therefore, it is necessary to provide more effective decoupling for an IC power supply circuit.
In order to increase the decoupling effect, it is effective to use a decoupling capacitor having outstanding impedance-frequency characteristics. An example of such a decoupling capacitor is a monolithic ceramic capacitor. Because of their low ESL, the monolithic ceramic capacitors have an outstanding noise-absorbing effect over a wide frequency band as compared to the electrolytic capacitors.
Such a monolithic ceramic capacitor suitable for decoupling is disclosed in, for example, Japanese Unexamined Patent Application Publication No. 2003-318066. In the disclosed monolithic ceramic capacitor, a potential is applied to some capacitors in a capacitor array to cause a current to flow in a certain direction while another potential is applied to the other capacitors to cause a current to flow in the opposite direction so that magnetic fields generated by currents flowing through two capacitors are canceled to reduce the ESL.
However, the monolithic ceramic capacitor disclosed in Japanese Unexamined Patent Application Publication No. 2003-318066 has the following problems.
First, in a monolithic ceramic capacitor which is mounted on a wiring substrate via solder joints, due to a defect, such as cracking of a solder joint, a disconnection may occur between a certain external terminal electrode and a conductive land. In this case, it may be difficult to obtain a capacitance corresponding to an array associated with the external terminal electrode in which the disconnection has occurred. The capacitance may therefore be significantly reduced. Even if only one solder joint is cracked, the capacitance corresponding to the “inverse of the number of arrays” is decreased.
Another problem is that it is time-consuming to measure the overall capacitance of the monolithic ceramic capacitor. The overall capacitance of the monolithic ceramic capacitor is substantially equal to the sum total of the capacitances of the individual capacitance arrays. Thus, the overall capacitance is determined by measuring the capacitance of each of the capacitor arrays and summing the capacitances, or by measuring the capacitance in a state in which all external terminal electrodes are connected to a wiring substrate or any other substrate.